performance = time/program
=instructions/program × cycles/instruction × time/cycle
(code size) (CPI) (cycle time)
CISC performs multiple instructions per cycle and RISC only one.
Using CISC and RISC as basis for comparison;
- considering only instructions per program, keeping the rest constant, CISC would perform better than RISC
- considering cycles per instruction and keeping the rest constant, RISC would perform better than CISC
- increment in frequency increases performance although a great speedup will nullify that effect (frequency is inverse of cycle time)