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The SPARC architecture uses the big-endian convention, rather than the little-endian convention used by the Intel 80x86 family of processors. The SPARC addressing scheme thus stores the higher-order bytes of multi-byte values at the lower memory addresses. For example, a word value (i.e. four bytes) stored in memory will have the most significant byte stored at address N and the least significant byte stored at address N + 3. The address of any data value is thus the address of its most significant byte. In general, this distinction is not important, unless one tries to retrieve multi-byte values in smaller size units (e.g. retrieving a four-byte word value as four individual bytes)

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asked Dec 18, 2020 in Computer Architecture by (user.guest)
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