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True Data Dependency (Read After Write)

This exists when the output of one instruction is required as an input to a subsequent instruction. They are intrinsic features of the user’s program. They cannot be eliminated by compiler or hardware techniques.

Eg. Instance 

1. A = 3

2. B = A

3. C = B

In the above, instruction 3 is truly dependent on instruction 2, as the final value of C depends on the instruction updating B. Instruction 2 is truly dependent on instruction 1, as the final value of B depends on the instruction updating A. Follows that 3 is dependent on 1 as well.

Output Data Dependency (Write After Write)

This exists if two instructions are writing into the same location; if the second instruction writes before the first one, an error occurs. It occurs when the ordering of instructions will affect the final output value of a variable. In the example below, there is an output dependency between instructions 3 and 1 changing the ordering of instructions in this example will change the final value of B, thus these instructions cannot be executed in parallel.

Eg. Instance 

1. B = 3

2. A = B + 1

3. B = 7

Anti Data Dependency (Write After Read)

This exists if an instruction uses a location as an operand while a following one is writing into that location; if the first one is still using the location when the second one writes into it, an error occurs.

Occurs when an instruction requires a value that is later updated

In the following example, instruction 2 anti-depends on instruction 3. The ordering of these instructions cannot be changed, nor can they be executed in parallel (possibly changing the instruction ordering), as this would affect the final value of A.

Eg. Instance

1. B = 3

2. A = B + 1

3. B = 7

An anti-dependency is an example of a name dependency. That is, renaming of variables could remove the dependency

The artificial dependencies are Output and Anti data dependencies and they’re referred to as such because they can be easily solved by choosing another register.

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