How many 64 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?

Question

How many 64 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?

1 Answer

Related questions

+1 vote

1 answer 581 views

In one case a byte is defined as a sequence of 8 bits. Each bit can be either zero or one. How many different bytes are possible?

asked Aug 30, 2021 in Maths & Statistics by anonymous

+1 vote

1 answer 250 views

How many bytes are used to represent the Node ID in a class A network

asked Nov 22, 2021 in Computer Networks by (user.guest)

0 votes

1 answer 2.1k views

Suppose that N switches supporting K VLAN groups are to be connected via a trunking protocol. How many ports are needed to connect the switches? Justify your answer.

asked Oct 11, 2020 in Computer Networks by (user.guest)

+1 vote

1 answer 468 views

Some of the most important pieces of data stored in the RAM are the instructions which basically tells the CPU what to do at a particular time. Explain the concept of Instruction Set in the CPU and how it works.

asked Oct 26, 2020 in Computer Architecture by anonymous

+2 votes

1 answer 1.6k views

How many hexadecimal digits are needed to define the netid in each of the following classes?

asked Jul 3, 2020 in Computer Networks by anonymous

+1 vote

1 answer 622 views

The RAM is a temporal storage area in the computer system that usually contains the data that are being processed by the CPU. Briefly describe how the CPU and the RAM interacts to carry out their operation.

asked Oct 26, 2020 in Computer Architecture by anonymous

+2 votes

1 answer 6.0k views

An Ethernet MAC sublayer receives 1510 bytes of data from the LLC layer. Can the data be encapsulated in one frame? If not, how many frames need to be sent? What is the size of the data in each frame?

asked Sep 24, 2020 in Computer Networks by anonymous

+1 vote

1 answer 3.8k views

An Ethernet MAC sublayer receives 42 bytes of data from the LLC sublayer. How many bytes of padding must be added to the data?

asked Jul 2, 2020 in Computer Networks by anonymous

+1 vote

0 answers 469 views

The Intel 8085 CPU is one of the many CPUs by Intel. Compare the Intel 8085 CPU with (a) Zilog Z80 CPU (b) Motorolla 6800 CPU in term of architecture, number of instructions, addressing modes and the supporting chips.

asked Apr 27, 2021 in Computer Architecture by anonymous

+1 vote

0 answers 72 views

How many 8-bit I/O control module registers do we need for status reading and control of each device?

asked May 12 in Computer Architecture by anonymous

0 votes

0 answers 544 views

A microprocessor has an on - chip 2 - way set associative cache with a total capacity of 8 kByte. Each line in cache can store sixteen 8 - bit words. It has a total addressable space of 16 MBytes. Consider the following CPU instruction: Load AB1234h,

asked May 29, 2021 in Computer Architecture by anonymous

+1 vote

1 answer 209 views

In TCP Header format if a device wants to send 8 bytes of data. Is it valid or not? Explain why

asked Oct 1, 2020 in Computer Networks by anonymous

0 votes

0 answers 411 views

Compute the total delay involved for a packet of size 1000 bytes to propagate over a link of distance 3000 km, propagation speed 3.0 x 108 m/s and transmission rate 2 Mbps.

asked May 7, 2021 in Computer Networks by (user.guest)

+1 vote

1 answer 447 views

What are the types of Random Access Memory - RAM

asked Sep 17, 2021 in Computer Architecture by anonymous

+1 vote

1 answer 1.3k views

By means of suitable diagram, show how a CPU chip is interconnected to an I/O and a main memory in a simple Von Newman computer design bus system

asked Aug 26, 2019 in Computer Architecture by anonymous

+1 vote

1 answer 197 views

How many bits are in a byte?

asked Sep 17, 2021 in Computer Architecture by anonymous

+1 vote

1 answer 345 views

What are some differences between Read Only Memory - ROM and Random Access Memory - RAM

asked Sep 17, 2021 in Computer Architecture by anonymous

+1 vote

1 answer 8.3k views

Suppose there are three routers between a source host and a destination host. Ignoring fragmentation, an IP datagram sent from the source host to the destination host will travel over how many interfaces?

asked Oct 6, 2020 in Computer Networks by (user.guest)

+1 vote

1 answer 1.5k views

An address space uses three symbols: 0, 1, and 2 to represent addresses. If each address is made of 10 symbols, how many addresses are available in this system?

asked Jul 3, 2020 in Computer Networks by anonymous

+1 vote

1 answer 323 views

Write a program using do-while loop to count how many students passed and how many have failed an exam that is marked out of 100 marks

asked Jan 28 in Programming Languages & Algorithms by anonymous

+1 vote

1 answer 887 views

What is the general relationship among access time, memory cost, and capacity?(Using the concepts of memories in computer system)

asked Oct 22, 2021 in Computer Architecture by (user.guest)

+1 vote

1 answer 3.6k views

How does the principle of locality relate to the use of multiple memory levels?

asked Dec 29, 2019 in Computer Architecture by anonymous

+1 vote

1 answer 289 views

Write short notes on the computer Motherboard and the many controller chips and other devices connected to it

asked Oct 11, 2021 in Hardware Systems & Electronics by anonymous

+2 votes

1 answer 329 views

What is meant by the term 'a large window of execution is needed’ with reference to superscalar design and processes

asked Aug 26, 2019 in Computer Architecture by anonymous

+5 votes

1 answer 633 views

If the size of the memory is 2GB and block size is 4 Bytes, then which cache line is supposedly be holding the memory block with number "256" if cache supports Direct Mapping.

asked Aug 4, 2020 in Computer Architecture by anonymous

+1 vote

0 answers 25 views

Given a number in memory location 6100H ( x ), calculate th e result based on the following arithmetic formula:

asked May 19 in Computer Architecture by anonymous

+3 votes

1 answer 16.4k views

Explain eight (8) characteristics of memory systems and their impact on data processing. Give an example in each case.

asked Jul 28, 2020 in Computer Architecture by anonymous

+2 votes

1 answer 1.1k views

You are responsible for the design of a communications switch that has to provide 24/7 availability, but which is not safety-critical. Giving reasons for your answer, suggest an architectural style that might be used for this system.

asked Mar 13, 2020 in Software Engineering by anonymous

+1 vote

1 answer 1.1k views

You are responsible for the design of a communications switch that has to provide 24/7 availability but that is not safety-critical...

asked Nov 10, 2019 in Software Engineering by anonymous

+1 vote

1 answer 200 views

A computer on a 6-Mbps network is regulated by a token bucket. The token bucket is filled with a rate 1 Mbps. The bucket is initially filled to capacity with 1 Mb. How long can the computer transmit at the full 6 Mbps?

asked Apr 13 in Computer Networks by (user.guest)

+1 vote

1 answer 450 views

A software process that is based on high quality should produce high quality software products but to manage the quality of a system many problems are faced, what are these probable problems?

asked Apr 7, 2021 in Software Engineering by anonymous

+1 vote

1 answer 308 views

A software process that is based on high quality should produce high quality software products but to manage the quality of a system many problems are faced, what are these probable problems?

asked Apr 7, 2021 in Software Engineering by anonymous

+1 vote

1 answer 774 views

How to Measure Capacity of Communication Media?

asked Sep 22, 2021 in Others by anonymous

+1 vote

1 answer 714 views

How many addressing modes are there in the Intel 8085 CPU ? Describe them.

asked Apr 27, 2021 in Computer Architecture by anonymous

+1 vote

1 answer 22.4k views

Consider the following network. With the indicated link costs, use Dijkstra’s shortest-path algorithm to compute the shortest path from x to all network nodes. Show how the algorithm works by computing a table similar to Table 4.3.

asked Oct 8, 2020 in Computer Networks by (user.guest)

+1 vote

1 answer 166 views

A request to fill the general purpose register with the content of the main memory cell is known as what?

asked Dec 18, 2021 in Computer Architecture by (user.guest)

+2 votes

1 answer 2.0k views

Why is there a trend toward allocating an increasing fraction of chip area to cache memory?

asked Jan 26, 2020 in Computer Architecture by anonymous

+2 votes

1 answer 1.5k views

Is it necessary for the pages of a process in main memory to be in sequential order?

asked Jan 2, 2020 in Computer Architecture by anonymous

+2 votes

1 answer 1.7k views

Is it necessary for all of the pages of a process to be in main memory while the process is executing?

asked Jan 2, 2020 in Computer Architecture by anonymous

+1 vote

1 answer 2.9k views

Explain why one type of RAM is considered to be analog and the other digital.

asked Dec 29, 2019 in Computer Architecture by anonymous

+1 vote

1 answer 1.4k views

Explain how the complementary strategies of resistance, recognition, recovery, and reinstatement may be used to provide system resilience.

asked Nov 10, 2019 in Software Engineering by anonymous

+1 vote

1 answer 5.2k views

What is the general relationship among access time, memory cost, and capacity?

asked Dec 29, 2019 in Computer Architecture by anonymous

+1 vote

1 answer 377 views

How many instructions has the Intel 8085 CPU ? List the groups of instructions and the list of instructions.

asked Apr 27, 2021 in Computer Architecture by anonymous

0 votes

0 answers 221 views

i) State and prove convolution property of DFT. (8) ii) Find the inverse DFT of X(k) = {6, –1 –2j, –2, –1 + 2j}.

asked Jul 19, 2021 in Hardware Systems & Electronics by anonymous

+1 vote

1 answer 1.5k views

How to Store the data byte 32H into memory location 4000H.

asked Oct 1, 2021 in Computer Architecture by anonymous

+3 votes

1 answer 968 views

What differences between a CD and a DVD? Account for the larger capacity of the latter?

asked Dec 31, 2019 in Computer Architecture by anonymous

+1 vote

1 answer 910 views

Multiply two 8-bit numbers stored in memory locations 2200H and 2201H by repetitive addition and store the result in memory locations 2300H and 2301H.

asked Oct 1, 2021 in Computer Architecture by anonymous

+3 votes

1 answer 148 views

If Denis Electric’s devices generated undesired amount of heat, what specific knowledge is needed to solve this problem? What advice would you give to the manager of Vees Electric?

asked Oct 3, 2020 in Computer Architecture by anonymous

0 votes

0 answers 285 views

What are the factors needed for you decide either to use agile method or a plan-driven approach

asked Nov 19, 2020 in Software Engineering by anonymous

+1 vote

1 answer 140 views

A new version of the TCP header that accommodates a round-trip time of 200ms, a network bandwidth of 100Mbps, a maximum segment lifetime of 150 sec, How many bits will you need for the advertised window field and for the sequence number field?

asked Apr 20 in Computer Networks by (user.guest)

How many 64 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?

Your answer

1 Answer

Your comment on this answer:

Related questions